A semiconductor photoimaging device includes a focal plane array of pixel cells supported by a substrate. Each of the pixel cells includes a photoconversion device, for example, a photogate, a photoconductor, or a photodiode, for generating and accumulating photo-generated charge in a portion of the substrate. A readout circuit is connected to each pixel cell and typically includes at least an output transistor, which receives photogenerated charges from a doped diffusion region and produces an output signal that is periodically read-out through a pixel access transistor. The imager may optionally include a transistor for transferring charge from the photoconversion device to the diffusion region or the diffusion region may be directly connected to, or be part of, the photoconversion device. A transistor is also typically provided for resetting the diffusion region to a predetermined charge level before it receives the photo-converted charges. A CMOS imager circuit is often associated with a color filter, such as a Bayer filter, for discerning various wavelengths of light.
One typical CMOS imager pixel circuit, the three-transistor (3T) pixel, contains a photodiode for supplying photo-generated charge to a diffusion region; a reset transistor for resetting the diffusion region; a source follower transistor having a gate connected to the diffusion region, for producing an output signal; and a row select transistor for selectively connecting the source follower transistor to a column line of a pixel array. Another typical CMOS imager pixel employs a four-transistor (4T) configuration, which is similar to the 3T configuration, but utilizes a transfer transistor to gate charges from the photodiode to the diffusion region and the source follower transistor for output.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630, U.S. Pat. No. 6,376,868, U.S. Pat. No. 6,310,366, U.S. Pat. No. 6,326,652, U.S. Pat. No. 6,204,524, and U.S. Pat. No. 6,333,205, each of which is assigned to Micron Technology, Inc., the entire disclosures of which are incorporated herein by reference.
Typical imaging devices have a light shield providing apertures exposing at least a portion of the photoconversion devices to incoming light while shielding the remainder of the pixel circuit and neighboring pixels from the light. Light shields separate received light signals of adjacent pixels, known as crosstalk, and prevent photocurrent from being generated in undesirable locations in the pixel. As a result, the imaging device can achieve higher spatial resolution and color affinity with less blooming, blurring, and other detrimental effects. Light shields can also serve to protect the circuitry associated with the pixels from radiation damage, for example.
In the prior art, light shields have typically been formed in the metal interconnect layering (e.g., the Metal 1 (M1), Metal 2 (M2), or, if utilized, Metal 3 (M3) layers) of the integrated circuit. Metallization layer light shield structures have some drawbacks, such as limiting use of the metal layer to the light shield rather than for its normal conductive interconnect purpose. Additionally, having the light shield in upper metallization (conductive interconnect) layers, spaced some 18,000 Å from the photo-sensitive area, can increase crosstalk, light piping, and light shadowing in the pixels, which can cause errors.
To satisfy optical performance specifications, light masks need to exhibit good light absorption, low reflectivity (higher reflectivity might induce light back scattering) and be as close as possible to the pixel surface to minimize light scattering to vicinal pixels. Metal layers in CMOS imaging devices normally provide this function. Metal layers also serve as conductors. An example of a metal light shield formed on an insulator above the pixel surface is provided in U.S. Pat. No. 6,611,013, assigned to Micron Technology, Inc., and U.S. application Ser. No. 10/410,191 filed Apr. 10, 2003 in the name of Rhodes, the entire disclosures of which are incorporated herein by reference.
Performance objectives become more difficult to satisfy as device sizes become smaller. Widths of metal lines used as light masks also become smaller, down to equal to or less than the wavelength of the light being detected. Additionally, objects at sub-wavelength sizes exhibit a great deal of scattering. Consequently, the need to locate the light shield closer to the pixel surface increases with advancing miniaturization. As light shields are located closer to the pixel surface, however, the light shield layers are exposed to more manufacturing steps and hence are subjected to greater temperatures.
Light shields that can be located close to the pixel surface are needed. The light shields must have good thermal stability, be able to withstand the rigors of “front end” CMOS processing, and be compatible with adjacent structures in the pixel.